Searched refs:CP0_PWBase (Results 1 – 5 of 5) sorted by relevance
/openbmc/qemu/target/mips/sysemu/ |
H A D | machine.c | 268 VMSTATE_UINTTL(env.CP0_PWBase, MIPSCPU),
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/openbmc/qemu/target/mips/ |
H A D | kvm.c | 789 &env->CP0_PWBase); in kvm_mips_put_cp0_registers() 1009 &env->CP0_PWBase); in kvm_mips_get_cp0_registers()
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H A D | cpu.h | 663 target_ulong CP0_PWBase; member
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/openbmc/qemu/target/mips/tcg/sysemu/ |
H A D | tlb_helper.c | 741 uint64_t vaddr = env->CP0_PWBase; in page_table_walk_refill()
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/openbmc/qemu/target/mips/tcg/ |
H A D | translate.c | 5544 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_PWBase)); in gen_mfc0() 6274 gen_mtc0_store32(arg, offsetof(CPUMIPSState, CP0_PWBase)); in gen_mtc0() 7026 tcg_gen_ld_tl(arg, tcg_env, offsetof(CPUMIPSState, CP0_PWBase)); in gen_dmfc0() 7740 tcg_gen_st_tl(arg, tcg_env, offsetof(CPUMIPSState, CP0_PWBase)); in gen_dmtc0()
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