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Searched refs:CP0_ENTRYLO0 (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/arch/mips/include/asm/mach-ip27/
H A Dkernel-entry-init.h47 mtc0 t0, CP0_ENTRYLO0 # physaddr, VG, cach exlwr
/openbmc/u-boot/arch/mips/include/asm/
H A Dmipsregs.h38 #define CP0_ENTRYLO0 $2 macro
/openbmc/linux/arch/mips/include/asm/
H A Dmipsregs.h48 #define CP0_ENTRYLO0 $2 macro