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Searched refs:CP0_EBASE (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/arch/mips/include/asm/mach-loongson64/
H A Dkernel-entry-init.h82 mfc0 t1, CP0_EBASE
/openbmc/linux/arch/mips/kernel/
H A Dcps-vec-ns16550.S200 DUMP_COP0_REG(CP0_EBASE, "EBase: 0x", long, MFC0)
/openbmc/u-boot/arch/mips/cpu/
H A Dstart.S146 1: mfc0 t0, CP0_EBASE
/openbmc/u-boot/arch/mips/include/asm/
H A Dmipsregs.h56 #define CP0_EBASE $15, 1 macro
/openbmc/linux/arch/mips/include/asm/
H A Dmipsregs.h76 #define CP0_EBASE $15, 1 macro