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Searched refs:CP0WH_M (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/mips/
H A Dcpu.h1007 #define CP0WH_M 31 macro
H A Dcpu.c321 env->CP0_WatchHi[i] = 1 << CP0WH_M; in mips_cpu_reset_hold()
/openbmc/qemu/target/mips/tcg/sysemu/
H A Dcp0_helper.c1336 uint64_t m_bit = env->CP0_WatchHi[sel] & (1 << CP0WH_M); /* read-only */ in helper_mtc0_watchhi()