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Searched refs:CP0MVPC0_PTC (Results 1 – 4 of 4) sorted by relevance

/openbmc/qemu/target/mips/
H A Dcpu.h118 #define CP0MVPC0_PTC 0 macro
H A Dcpu-defs.c.inc1047 // (0x04 << CP0MVPC0_PTC);
1049 (0x00 << CP0MVPC0_PTC);
/openbmc/qemu/hw/mips/
H A Dmalta.c978 CP0MVPC0_PTC, 8, in malta_mips_config()
/openbmc/qemu/target/mips/tcg/
H A Dtranslate.c8291 (env->mvp->CP0_MVPConf0 & (0xff << CP0MVPC0_PTC))) { in gen_mftr()
8517 (env->mvp->CP0_MVPConf0 & (0xff << CP0MVPC0_PTC))) { in gen_mttr()