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Searched refs:CP0C1_PC (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/mips/
H A Dcpu-defs.c.inc32 (0 << CP0C1_C2) | (0 << CP0C1_MD) | (0 << CP0C1_PC) | \
434 (1 << CP0C1_PC) | (1 << CP0C1_FP),
479 (0 << CP0C1_PC) | (1 << CP0C1_WR) | (1 << CP0C1_EP),
516 (4 << CP0C1_DL) | (3 << CP0C1_DA) | (1 << CP0C1_PC) |
601 (1 << CP0C1_PC) | (1 << CP0C1_WR) | (1 << CP0C1_EP),
622 (1 << CP0C1_PC) | (1 << CP0C1_WR) | (1 << CP0C1_EP),
650 (1 << CP0C1_PC) | (1 << CP0C1_WR) | (1 << CP0C1_EP),
679 (1 << CP0C1_PC) | (1 << CP0C1_WR) | (1 << CP0C1_EP),
706 (1 << CP0C1_PC) | (1 << CP0C1_WR) | (1 << CP0C1_EP),
727 (1 << CP0C1_PC) | (1 << CP0C1_WR) | (1 << CP0C1_EP),
[all …]
H A Dcpu.h868 #define CP0C1_PC 4 macro
/openbmc/qemu/target/mips/tcg/sysemu/
H A Dcp0_helper.c1054 if ((env->CP0_Config1 & (1 << CP0C1_PC)) && in helper_mtc0_hwrena()