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Searched refs:CORE_RESET (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/phy/qualcomm/
H A Dphy-qcom-qusb2.c62 #define CORE_RESET BIT(5) macro
651 CORE_PLL_EN_FROM_RESET | CORE_RESET | in qusb2_phy_runtime_suspend()
712 CORE_RESET | CORE_RESET_MUX); in qusb2_phy_runtime_resume()
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dnxp,imx8mq-mipi-csi2.yaml46 - description: CORE_RESET reset register bit definition
/openbmc/linux/drivers/net/ethernet/xscale/
H A Dixp4xx_eth.c106 #define CORE_RESET 0x01 macro
1505 __raw_writel(DEFAULT_CORE_CNTRL | CORE_RESET, in ixp4xx_eth_probe()
/openbmc/qemu/hw/i3c/
H A Daspeed_i3c.c164 FIELD(RESET_CTRL, CORE_RESET, 0, 1)
1023 if (FIELD_EX32(val, RESET_CTRL, CORE_RESET)) { in aspeed_i3c_device_reset_ctrl_w()