Searched refs:CORE_L3_DIV (Results 1 – 2 of 2) sorted by relevance
177 0x00000003, CORE_L3_DIV); in dpll3_init_34xx()223 clrsetbits_le32(&p2, 0x00000003, CORE_L3_DIV); in dpll3_init_34xx()427 0x00000003, CORE_L3_DIV); in dpll3_init_36xx()473 clrsetbits_le32(&p2, 0x00000003, CORE_L3_DIV); in dpll3_init_36xx()
26 #define CORE_L3_DIV 2 /* 166MHz : L3 {DDR} */ macro