Home
last modified time | relevance | path

Searched refs:CONFIG_SYS_FPGA_BASE (Results 1 – 9 of 9) sorted by relevance

/openbmc/u-boot/board/socrates/
H A Dtlb.c56 #if defined(CONFIG_SYS_FPGA_BASE)
61 SET_TLB_ENTRY(1, CONFIG_SYS_FPGA_BASE, CONFIG_SYS_FPGA_BASE,
H A Dlaw.c37 #if defined(CONFIG_SYS_FPGA_BASE)
38 SET_LAW(CONFIG_SYS_FPGA_BASE, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
H A Dsocrates.c244 val[i++] = CONFIG_SYS_FPGA_BASE; in ft_board_setup()
379 reg = in_be32((void *)(CONFIG_SYS_FPGA_BASE + 0x0c)); in board_backlight_brightness()
381 out_be32((void *)(CONFIG_SYS_FPGA_BASE + 0x0c), in board_backlight_brightness()
389 reg = in_be32((void *)(CONFIG_SYS_FPGA_BASE + 0x0c)); in board_backlight_brightness()
391 out_be32((void *)(CONFIG_SYS_FPGA_BASE + 0x0c), reg); in board_backlight_brightness()
/openbmc/u-boot/include/configs/
H A DBSC9132QDS.h280 #define CONFIG_SYS_FPGA_BASE 0xffb00000 macro
282 #define QIXIS_BASE CONFIG_SYS_FPGA_BASE
293 #define CONFIG_SYS_FPGA_BASE_PHYS CONFIG_SYS_FPGA_BASE
295 #define CONFIG_SYS_CSPR2 (CSPR_PHYS_ADDR(CONFIG_SYS_FPGA_BASE) \
H A Dsocrates.h135 #define CONFIG_SYS_FPGA_BASE 0xc0000000 macro
141 #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_FPGA_BASE + 0x70)
H A Dhrcon.h259 #define CONFIG_SYS_FPGA_BASE(k) CONFIG_SYS_FPGA0_BASE macro
H A Dstrider.h256 #define CONFIG_SYS_FPGA_BASE(k) CONFIG_SYS_FPGA0_BASE macro
/openbmc/u-boot/board/freescale/bsc9132qds/
H A Dtlb.c77 #ifdef CONFIG_SYS_FPGA_BASE
79 SET_TLB_ENTRY(1, CONFIG_SYS_FPGA_BASE, CONFIG_SYS_FPGA_BASE_PHYS,
/openbmc/u-boot/scripts/
H A Dconfig_whitelist.txt2621 CONFIG_SYS_FPGA_BASE