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Searched refs:CONFIG_SYS_DDR_TIMING_3_900 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/board/freescale/corenet_ds/
H A Dp4080ds_ddr.c27 #define CONFIG_SYS_DDR_TIMING_3_900 0x00020000 macro
151 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_900,
183 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_900,
/openbmc/u-boot/scripts/
H A Dconfig_whitelist.txt2414 CONFIG_SYS_DDR_TIMING_3_900