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Searched refs:CONFIG_SYS_DDR_TIMING_3_1200 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/board/freescale/corenet_ds/
H A Dp4080ds_ddr.c9 #define CONFIG_SYS_DDR_TIMING_3_1200 0x01030000 macro
279 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_1200,
311 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_1200,
/openbmc/u-boot/scripts/
H A Dconfig_whitelist.txt2410 CONFIG_SYS_DDR_TIMING_3_1200