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Searched refs:CONFIG_SYS_DDR_TIMING_0_900 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/board/freescale/corenet_ds/
H A Dp4080ds_ddr.c28 #define CONFIG_SYS_DDR_TIMING_0_900 0xCC440104 macro
152 .timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0_900,
184 .timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0_900,
/openbmc/u-boot/scripts/
H A Dconfig_whitelist.txt2393 CONFIG_SYS_DDR_TIMING_0_900