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Searched refs:CONFIG_SYS_DDR_CONTROL_800 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/include/configs/
H A DBSC9132QDS.h133 #define CONFIG_SYS_DDR_CONTROL_800 0x470C0000 macro
168 #define CONFIG_SYS_DDR_CONTROL CONFIG_SYS_DDR_CONTROL_800
180 #define CONFIG_SYS_DDR_CONTROL CONFIG_SYS_DDR_CONTROL_800
/openbmc/u-boot/board/freescale/bsc9132qds/
H A Dspl_minimal.c24 __raw_writel(CONFIG_SYS_DDR_CONTROL_800 | SDRAM_CFG_32_BE, &ddr->sdram_cfg); in sdram_init()
/openbmc/u-boot/scripts/
H A Dconfig_whitelist.txt2325 CONFIG_SYS_DDR_CONTROL_800