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Searched refs:CONFIG_SYS_DDR_CONTROL_2_800 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/include/configs/
H A DBSC9132QDS.h134 #define CONFIG_SYS_DDR_CONTROL_2_800 0x04401050 macro
169 #define CONFIG_SYS_DDR_CONTROL_2 CONFIG_SYS_DDR_CONTROL_2_800
181 #define CONFIG_SYS_DDR_CONTROL_2 CONFIG_SYS_DDR_CONTROL_2_800
/openbmc/u-boot/board/freescale/bsc9132qds/
H A Dspl_minimal.c25 __raw_writel(CONFIG_SYS_DDR_CONTROL_2_800, &ddr->sdram_cfg_2); in sdram_init()
/openbmc/u-boot/scripts/
H A Dconfig_whitelist.txt2324 CONFIG_SYS_DDR_CONTROL_2_800