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Searched refs:CONFIG_SYS_CSPR3 (Results 1 – 15 of 15) sorted by relevance

/openbmc/u-boot/drivers/misc/
H A Dfsl_ifc.c136 #if defined(CONFIG_SYS_CSPR3) && defined(CONFIG_SYS_CSOR3)
137 CONFIG_SYS_CSPR3,
473 #if defined(CONFIG_SYS_CSPR3) && defined(CONFIG_SYS_CSOR3) in init_early_memctl_regs()
479 set_ifc_cspr(IFC_CS3, CONFIG_SYS_CSPR3); in init_early_memctl_regs()
/openbmc/u-boot/include/configs/
H A Dls1046aqds.h305 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR macro
339 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR macro
372 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR macro
H A Dls1043aqds.h277 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR macro
311 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR macro
344 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR macro
H A Dls1021aqds.h283 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR macro
316 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR macro
H A Dls1088aqds.h250 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR macro
306 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR macro
H A Dls2080ardb.h181 #define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS_EARLY) \ macro
H A Dls2080aqds.h178 #define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS_EARLY) \ macro
H A DT4240QDS.h186 #define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \ macro
H A DB4860QDS.h268 #define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \ macro
H A DT4240RDB.h453 #define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(CONFIG_SYS_CPLD_BASE_PHYS) \ macro
H A DT1040QDS.h209 #define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \ macro
H A DP1010RDB.h445 #define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(CONFIG_SYS_CPLD_BASE_PHYS) \ macro
H A DT102xQDS.h285 #define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \ macro
H A DT208xQDS.h259 #define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \ macro
/openbmc/u-boot/scripts/
H A Dconfig_whitelist.txt2214 CONFIG_SYS_CSPR3