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Searched refs:CONFIG_ARMV7_SECURE_BASE (Results 1 – 17 of 17) sorted by relevance

/openbmc/u-boot/arch/arm/cpu/armv7/
H A Dvirt-dt.c32 if (*start + *size < CONFIG_ARMV7_SECURE_BASE || in armv7_apply_memory_carveout()
33 *start >= (u64)CONFIG_ARMV7_SECURE_BASE + in armv7_apply_memory_carveout()
38 if (*start == CONFIG_ARMV7_SECURE_BASE || in armv7_apply_memory_carveout()
39 *start + *size == (u64)CONFIG_ARMV7_SECURE_BASE + in armv7_apply_memory_carveout()
46 if (*start == CONFIG_ARMV7_SECURE_BASE) in armv7_apply_memory_carveout()
63 #ifndef CONFIG_ARMV7_SECURE_BASE in psci_update_dt()
H A Dvirt-v7.c54 #ifdef CONFIG_ARMV7_SECURE_BASE in relocate_secure_section()
58 memcpy((void *)CONFIG_ARMV7_SECURE_BASE, __secure_start, sz); in relocate_secure_section()
60 flush_dcache_range(CONFIG_ARMV7_SECURE_BASE, in relocate_secure_section()
61 CONFIG_ARMV7_SECURE_BASE + szflush); in relocate_secure_section()
/openbmc/u-boot/arch/arm/cpu/
H A Du-boot.lds20 #if defined(CONFIG_ARMV7_SECURE_BASE) && defined(CONFIG_ARMV7_NONSEC)
22 * If CONFIG_ARMV7_SECURE_BASE is true, secure code will not
25 * CONFIG_ARMV7_SECURE_BASE, which is the linking and running
28 * If CONFIG_ARMV7_SECURE_BASE is undefined, the secure zone will
34 * So DISCARD is only for CONFIG_ARMV7_SECURE_BASE.
72 #ifndef CONFIG_ARMV7_SECURE_BASE
79 #ifndef CONFIG_ARMV7_SECURE_BASE
80 #define CONFIG_ARMV7_SECURE_BASE macro
84 .secure_text CONFIG_ARMV7_SECURE_BASE :
/openbmc/u-boot/arch/arm/mach-tegra/
H A Dap.c177 BUILD_BUG_ON(CONFIG_ARMV7_SECURE_BASE & 0xFFFFF); in protect_secure_section()
180 writel(CONFIG_ARMV7_SECURE_BASE, &mc->mc_security_cfg0); in protect_secure_section()
H A Dboard2.c269 return (0 - CONFIG_ARMV7_SECURE_BASE) & ~(SZ_2M - 1); in carveout_size()
/openbmc/u-boot/include/configs/
H A Dsun6i.h17 #define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE macro
H A Dsun7i.h15 #define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE macro
H A Djetson-tk1.h33 #define CONFIG_ARMV7_SECURE_BASE 0xfff00000 macro
H A Dcei-tk1-som.h39 #define CONFIG_ARMV7_SECURE_BASE 0xfff00000 macro
H A Dmx7_common.h48 #define CONFIG_ARMV7_SECURE_BASE 0x00900000 macro
H A Dapalis-tk1.h146 #define CONFIG_ARMV7_SECURE_BASE 0xfff00000 macro
H A Dstm32mp1.h22 #define CONFIG_ARMV7_SECURE_BASE STM32_SYSRAM_BASE macro
H A Dls1021aiot.h9 #define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR macro
H A Dls1021atwr.h11 #define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR macro
H A Dls1021aqds.h11 #define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR macro
/openbmc/u-boot/arch/arm/include/asm/
H A Dsecure.h9 #if defined(CONFIG_ARMV7_SECURE_BASE) || defined(CONFIG_ARMV8_SECURE_BASE)
/openbmc/u-boot/scripts/
H A Dconfig_whitelist.txt55 CONFIG_ARMV7_SECURE_BASE