Searched refs:CMU_REG5 (Results 1 – 1 of 1) sorted by relevance
/openbmc/linux/drivers/phy/ |
H A D | phy-xgene.c | 157 #define CMU_REG5 0x0000a macro 797 cmu_clrbits(ctx, cmu_type, CMU_REG5, CMU_REG5_PLL_RESETB_MASK); in xgene_phy_sata_cfg_cmu_core() 841 cmu_rd(ctx, cmu_type, CMU_REG5, &val); in xgene_phy_sata_cfg_cmu_core() 848 cmu_wr(ctx, cmu_type, CMU_REG5, val); in xgene_phy_sata_cfg_cmu_core() 931 cmu_clrbits(ctx, cmu_type, CMU_REG5, CMU_REG5_PLL_RESETB_MASK); in xgene_phy_ssc_enable() 932 cmu_setbits(ctx, cmu_type, CMU_REG5, CMU_REG5_PLL_RESETB_MASK); in xgene_phy_ssc_enable() 1148 cmu_setbits(ctx, cmu_type, CMU_REG5, CMU_REG5_PLL_RESETB_MASK); in xgene_phy_cal_rdy_chk()
|