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Searched refs:CMU_DEVPLL (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/drivers/clk/owl/
H A Dclk_s900.c27 clrbits_le32(priv->base + CMU_DEVPLL, CMU_DEVPLL_CLK); in owl_clk_init()
45 dev_pll = readl(priv->base + CMU_DEVPLL); in owl_clk_init()
47 writel(dev_pll, priv->base + CMU_DEVPLL); in owl_clk_init()
56 setbits_le32(priv->base + CMU_DEVPLL, CMU_DEVPLL_CLK); in owl_clk_init()
/openbmc/u-boot/arch/arm/include/asm/arch-owl/
H A Dregs_s900.h15 #define CMU_DEVPLL (0x0004) macro
/openbmc/linux/drivers/clk/actions/
H A Dowl-s500.c32 #define CMU_DEVPLL (0x0004) macro
107 static OWL_PLL_NO_PARENT_DELAY(dev_pll_clk, "dev_pll_clk", CMU_DEVPLL, 6000000, 8, 0, 7, 8, 126, OW…
184 static OWL_MUX(dev_clk, "dev_clk", dev_clk_mux_p, CMU_DEVPLL, 12, 1, CLK_SET_RATE_PARENT);
H A Dowl-s700.c29 #define CMU_DEVPLL (0x0004) macro
91 static OWL_PLL_NO_PARENT(clk_dev_pll, "dev_pll", CMU_DEVPLL, 6000000, 8, 0, 8, 8, 126, NULL, CL…
117 static OWL_MUX(clk_dev, "dev_clk", dev_clk_p, CMU_DEVPLL, 12, 1, CLK_SET_RATE_PARENT);
H A Dowl-s900.c28 #define CMU_DEVPLL (0x0004) macro
86 static OWL_PLL_NO_PARENT(dev_pll_clk, "dev_pll_clk", CMU_DEVPLL, 6000000, 8, 0, 8, 20, 180, NULL, C…
115 static OWL_MUX(dev_clk, "dev_clk", dev_clk_p, CMU_DEVPLL, 12, 1, CLK_SET_RATE_PARENT);