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Searched refs:CM2_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_DIS__SHIFT (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_sh_mask.h8588 #define CM2_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_DIS__SHIFT macro
H A Ddcn_2_1_0_sh_mask.h17685 #define CM2_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_DIS__SHIFT macro
H A Ddcn_3_0_1_sh_mask.h18764 #define CM2_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_DIS__SHIFT macro
H A Ddcn_3_1_2_sh_mask.h19620 #define CM2_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_DIS__SHIFT macro
H A Ddcn_3_1_5_sh_mask.h17633 #define CM2_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_DIS__SHIFT macro
H A Ddcn_3_1_6_sh_mask.h20374 #define CM2_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_DIS__SHIFT macro
H A Ddcn_3_1_4_sh_mask.h27000 #define CM2_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_DIS__SHIFT macro
H A Ddcn_3_0_2_sh_mask.h19599 #define CM2_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_DIS__SHIFT macro
H A Ddcn_2_0_0_sh_mask.h20753 #define CM2_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_DIS__SHIFT macro
H A Ddcn_3_0_0_sh_mask.h20651 #define CM2_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_DIS__SHIFT macro