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Searched refs:CLK_WPE_VPP0_CACH1_DMA (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8188-wpe.c58 GATE_WPE_VPP0_0(CLK_WPE_VPP0_CACH1_DMA, "wpe_vpp0_cach1_dma", "top_img", 6),
H A Dclk-mt8195-wpe.c58 GATE_WPE_VPP0(CLK_WPE_VPP0_CACH1_DMA, "wpe_vpp0_cach1_dma", "top_img", 6),
/openbmc/linux/include/dt-bindings/clock/
H A Dmediatek,mt8188-clk.h425 #define CLK_WPE_VPP0_CACH1_DMA 11 macro
H A Dmt8195-clk.h501 #define CLK_WPE_VPP0_CACH1_DMA 11 macro