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Searched refs:CLK_VPP1_GALS5 (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8188-vpp1.c62 GATE_VPP1_0(CLK_VPP1_GALS5, "vpp1_gals5", "top_vpp", 28),
/openbmc/linux/include/dt-bindings/clock/
H A Dmediatek,mt8188-clk.h468 #define CLK_VPP1_GALS5 28 macro