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Searched refs:CLK_VPP0_WARP0_RELAY (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8195-vpp0.c83 GATE_VPP0_2(CLK_VPP0_WARP0_RELAY, "vpp0_warp0_relay", "top_wpe_vpp", 0),
H A Dclk-mt8188-vpp0.c88 GATE_VPP0_2(CLK_VPP0_WARP0_RELAY, "vpp0_warp0_relay", "top_wpe_vpp", 0),
/openbmc/linux/include/dt-bindings/clock/
H A Dmediatek,mt8188-clk.h400 #define CLK_VPP0_WARP0_RELAY 41 macro
H A Dmt8195-clk.h471 #define CLK_VPP0_WARP0_RELAY 38 macro