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Searched refs:CLK_VENC_SET0_LARB (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt6765-vcodec.c25 GATE_VENC(CLK_VENC_SET0_LARB, "venc_set0_larb", "mm_ck", 0),
H A Dclk-mt8192-venc.c25 GATE_VENC(CLK_VENC_SET0_LARB, "venc_set0_larb", "venc_sel", 0),
/openbmc/linux/include/dt-bindings/clock/
H A Dmt6765-clk.h294 #define CLK_VENC_SET0_LARB 0 macro
H A Dmt8192-clk.h500 #define CLK_VENC_SET0_LARB 0 macro
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8192.dtsi1750 clocks = <&vencsys CLK_VENC_SET0_LARB>,