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Searched refs:CLK_VDO0_DL_RELAY4 (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8188-vdo0.c73 GATE_VDO0_1(CLK_VDO0_DL_RELAY4, "vdo0_dl_relay4", "top_vpp", 7),
/openbmc/linux/include/dt-bindings/clock/
H A Dmediatek,mt8188-clk.h650 #define CLK_VDO0_DL_RELAY4 23 macro