Searched refs:CLK_TYPE_DIV6_RO (Results 1 – 3 of 3) sorted by relevance
/openbmc/u-boot/drivers/clk/renesas/ |
H A D | renesas-cpg-mssr.h | 59 CLK_TYPE_DIV6_RO, /* DIV6 Clock read only with extra divisor */ enumerator 77 DEF_BASE(_name, _id, CLK_TYPE_DIV6_RO, _parent, .offset = _offset, .div = _div, .mult = 1)
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/openbmc/linux/drivers/clk/renesas/ |
H A D | renesas-cpg-mssr.h | 37 CLK_TYPE_DIV6_RO, /* DIV6 Clock read only with extra divisor */ enumerator 56 DEF_BASE(_name, _id, CLK_TYPE_DIV6_RO, _parent, .offset = _offset, .div = _div, .mult = 1)
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H A D | renesas-cpg-mssr.c | 349 case CLK_TYPE_DIV6_RO: in cpg_mssr_register_core_clk() 359 if (core->type == CLK_TYPE_DIV6_RO) in cpg_mssr_register_core_clk()
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