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Searched refs:CLK_TX_PHASE_000 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-meson/
H A Dsd_emmc.h26 #define CLK_TX_PHASE_000 (0 << 10) macro
/openbmc/u-boot/drivers/mmc/
H A Dmeson_gx_mmc.c54 meson_mmc_clk |= CLK_TX_PHASE_000; in meson_mmc_config_clock()