CLK_TOP_TVE_SEL (reference) in projects: openbmc

Searched refs:CLK_TOP_TVE_SEL (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/include/dt-bindings/clock/
H A D	mt7623-clk.h	`121 #define CLK_TOP_TVE_SEL 107 macro`
/openbmc/linux/include/dt-bindings/clock/
H A D	mt2701-clk.h	`109 #define CLK_TOP_TVE_SEL 98 macro`
/openbmc/linux/drivers/clk/mediatek/
H A D	clk-mt2701.c	`532 MUX_GATE(CLK_TOP_TVE_SEL, "tve_sel", tve_parents,`
/openbmc/u-boot/drivers/clk/mediatek/
H A D	clk-mt7623.c	`535 MUX_GATE(CLK_TOP_TVE_SEL, dpi0_tve_parents, 0x90, 0, 3, 7),`