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Searched refs:CLK_TOP_TVD_SEL (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmt2712-clk.h192 #define CLK_TOP_TVD_SEL 161 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt2712.c741 MUX_GATE(CLK_TOP_TVD_SEL, "tvd_sel", tvd_parents, 0x550, 24, 2, 31),