Searched refs:CLK_TOP_SPI2_SEL (Results 1 – 6 of 6) sorted by relevance
| /openbmc/u-boot/include/dt-bindings/clock/ |
| H A D | mt7623-clk.h | 142 #define CLK_TOP_SPI2_SEL 128 macro
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| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | mt2701-clk.h | 130 #define CLK_TOP_SPI2_SEL 119 macro
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| /openbmc/u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt7623.c | 563 MUX_GATE(CLK_TOP_SPI2_SEL, spi_parents, 0xF0, 0, 3, 7),
690 GATE_PERI1(CLK_PERI_SPI2, CLK_TOP_SPI2_SEL, 10),
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| /openbmc/linux/drivers/clk/mediatek/ |
| H A D | clk-mt2701.c | 580 MUX_GATE(CLK_TOP_SPI2_SEL, "spi1_sel", spi_parents,
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| /openbmc/linux/arch/arm/boot/dts/mediatek/ |
| H A D | mt2701.dtsi | 416 <&topckgen CLK_TOP_SPI2_SEL>,
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| H A D | mt7623.dtsi | 581 <&topckgen CLK_TOP_SPI2_SEL>,
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