Searched refs:CLK_TOP_MUX_MFG (Results 1 – 6 of 6) sorted by relevance
| /openbmc/linux/drivers/clk/mediatek/ |
| H A D | clk-mt8183.c | 478 MUX_GATE_CLR_SET_UPD(CLK_TOP_MUX_MFG, "mfg_sel",
847 if (top_muxes[i].id == CLK_TOP_MUX_MFG) in clk_mt8183_reg_mfg_mux_notifier()
888 .mfg_clk_idx = CLK_TOP_MUX_MFG,
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| H A D | clk-mt6797.c | 336 MUX_GATE(CLK_TOP_MUX_MFG, "mfg_sel", mfg_parents, 0x0050, 24, 2, 31),
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| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | mt6797-clk.h | 20 #define CLK_TOP_MUX_MFG 10 macro
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| H A D | mt8183-clk.h | 39 #define CLK_TOP_MUX_MFG 3 macro
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| /openbmc/linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt6797.dtsi | 213 clocks = <&topckgen CLK_TOP_MUX_MFG>,
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| H A D | mt8183.dtsi | 875 clocks = <&topckgen CLK_TOP_MUX_MFG>;
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