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Searched refs:CLK_TOP_MUX_DSP1 (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmt8183-clk.h72 #define CLK_TOP_MUX_DSP1 36 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8183.c471 MUX_GATE_CLR_SET_UPD(CLK_TOP_MUX_DSP1, "dsp1_sel",
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8183.dtsi988 clocks = <&topckgen CLK_TOP_MUX_DSP1>;