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Searched refs:CLK_TOP_MUX_AUD_INTBUS (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dmt6797-afe-pcm.txt30 <&topckgen CLK_TOP_MUX_AUD_INTBUS>,
H A Dmt8183-afe-pcm.txt33 <&topckgen CLK_TOP_MUX_AUD_INTBUS>,
/openbmc/linux/include/dt-bindings/clock/
H A Dmt6797-clk.h31 #define CLK_TOP_MUX_AUD_INTBUS 21 macro
H A Dmt8183-clk.h48 #define CLK_TOP_MUX_AUD_INTBUS 12 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt6797.c354 MUX(CLK_TOP_MUX_AUD_INTBUS, "aud_intbus_sel", aud_intbus_parents,
H A Dclk-mt8183.c507 MUX_GATE_CLR_SET_UPD(CLK_TOP_MUX_AUD_INTBUS, "aud_intbus_sel",
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8183.dtsi860 clocks = <&topckgen CLK_TOP_MUX_AUD_INTBUS>,
1478 <&topckgen CLK_TOP_MUX_AUD_INTBUS>,