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Searched refs:CLK_TOP_HDMI_SEL (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmt8173-clk.h125 #define CLK_TOP_HDMI_SEL 115 macro
H A Dmt2701-clk.h108 #define CLK_TOP_HDMI_SEL 97 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dmt7623-clk.h122 #define CLK_TOP_HDMI_SEL 108 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8173-topckgen.c594 MUX_GATE(CLK_TOP_HDMI_SEL, "hdmi_sel", hdmi_parents, 0x00c0, 8, 2, 15),
H A Dclk-mt2701.c534 MUX_GATE(CLK_TOP_HDMI_SEL, "hdmi_sel", hdmi_parents,
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mt7623.c536 MUX_GATE(CLK_TOP_HDMI_SEL, hdmi_parents, 0x90, 8, 2, 15),
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8173.dtsi1321 assigned-clocks = <&topckgen CLK_TOP_HDMI_SEL>;