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Searched refs:CLK_TOP_ETHIF_SEL (Results 1 – 9 of 9) sorted by relevance

/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mt7623.c555 MUX_GATE_FLAGS(CLK_TOP_ETHIF_SEL, ethif_parents, 0xD0, 24, 3, 31,
714 GATE_ETH1(CLK_ETHSYS_HSDMA, CLK_TOP_ETHIF_SEL, 5),
718 GATE_ETH1(CLK_ETHSYS_PCM, CLK_TOP_ETHIF_SEL, 11),
719 GATE_ETH1(CLK_ETHSYS_GDMA, CLK_TOP_ETHIF_SEL, 14),
720 GATE_ETH1(CLK_ETHSYS_I2S, CLK_TOP_ETHIF_SEL, 17),
721 GATE_ETH1(CLK_ETHSYS_CRYPTO, CLK_TOP_ETHIF_SEL, 29),
/openbmc/linux/arch/arm/boot/dts/mediatek/
H A Dmt7623a.dtsi133 clocks = <&topckgen CLK_TOP_ETHIF_SEL>;
H A Dmt2701.dtsi158 <&topckgen CLK_TOP_ETHIF_SEL>;
613 <&topckgen CLK_TOP_ETHIF_SEL>;
653 <&topckgen CLK_TOP_ETHIF_SEL>;
733 clocks = <&topckgen CLK_TOP_ETHIF_SEL>,
H A Dmt7623.dtsi279 <&topckgen CLK_TOP_ETHIF_SEL>;
769 clocks = <&topckgen CLK_TOP_ETHIF_SEL>,
866 <&topckgen CLK_TOP_ETHIF_SEL>;
907 <&topckgen CLK_TOP_ETHIF_SEL>;
967 clocks = <&topckgen CLK_TOP_ETHIF_SEL>,
/openbmc/u-boot/arch/arm/dts/
H A Dmt7623.dtsi137 <&topckgen CLK_TOP_ETHIF_SEL>;
261 clocks = <&topckgen CLK_TOP_ETHIF_SEL>,
/openbmc/u-boot/include/dt-bindings/clock/
H A Dmt7623-clk.h137 #define CLK_TOP_ETHIF_SEL 123 macro
/openbmc/linux/include/dt-bindings/clock/
H A Dmt2701-clk.h121 #define CLK_TOP_ETHIF_SEL 110 macro
/openbmc/linux/Documentation/devicetree/bindings/pci/
H A Dmediatek-pcie.txt100 clocks = <&topckgen CLK_TOP_ETHIF_SEL>,
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt2701.c568 MUX_GATE(CLK_TOP_ETHIF_SEL, "ethif_sel", ethif_parents,