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Searched refs:CLK_TOP_ETHERPLL_50M (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmt2712-clk.h93 #define CLK_TOP_ETHERPLL_50M 62 macro
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dmediatek-dwmac.yaml176 <&topckgen CLK_TOP_ETHERPLL_50M>;
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt2712.c101 FACTOR(CLK_TOP_ETHERPLL_50M, "etherpll_50m", "etherpll", 1, 1),
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt2712e.dtsi751 <&topckgen CLK_TOP_ETHERPLL_50M>;