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Searched refs:CLK_TOP_EIP97B_SEL (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmediatek,mt7981-clk.h112 #define CLK_TOP_EIP97B_SEL 99 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt7981-topckgen.c363 MUX_GATE_CLR_SET_UPD(CLK_TOP_EIP97B_SEL, "eip97b_sel", eip97b_parents,