Home
last modified time | relevance | path

Searched refs:CLK_TOP_DPILVDS1_SEL (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmt2712-clk.h150 #define CLK_TOP_DPILVDS1_SEL 119 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt2712.c678 MUX_GATE(CLK_TOP_DPILVDS1_SEL, "dpilvds1_sel", dpilvds1_parents,