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Searched refs:CLK_TOP_CAMTG5_SEL (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmt8192-clk.h31 #define CLK_TOP_CAMTG5_SEL 19 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8192.c593 MUX_GATE_CLR_SET_UPD(CLK_TOP_CAMTG5_SEL, "camtg5_sel",