CLK_TOP_AUD_K5_SRC_SEL (reference) in projects: openbmc

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Searched refs:CLK_TOP_AUD_K5_SRC_SEL (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/include/dt-bindings/clock/
H A D	mt7623-clk.h	`153 #define CLK_TOP_AUD_K5_SRC_SEL 139 macro`
/openbmc/linux/include/dt-bindings/clock/
H A D	mt2701-clk.h	`138 #define CLK_TOP_AUD_K5_SRC_SEL 127 macro`
/openbmc/linux/drivers/clk/mediatek/
H A D	clk-mt2701.c	`604 MUX_GATE(CLK_TOP_AUD_K5_SRC_SEL, "aud_k5_src_sel", aud_src_parents,`
/openbmc/u-boot/drivers/clk/mediatek/
H A D	clk-mt7623.c	`577 MUX_GATE(CLK_TOP_AUD_K5_SRC_SEL, aud_src_parents, 0x12c, 19, 1, 27),`

Last Index Update: Sun Nov 24 03:03:17 CST 2024