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Searched refs:CLK_TOP_AUD1PLL_98M (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dmt2701-afe-pcm.txt142 assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL_98M>,
/openbmc/u-boot/include/dt-bindings/clock/
H A Dmt7623-clk.h91 #define CLK_TOP_AUD1PLL_98M 78 macro
/openbmc/linux/include/dt-bindings/clock/
H A Dmt2701-clk.h74 #define CLK_TOP_AUD1PLL_98M 64 macro
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mt7623.c175 FACTOR0(CLK_TOP_AUD1PLL_98M, CLK_APMIXED_AUD1PLL, 1, 3),
495 CLK_TOP_AUD1PLL_98M,
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt2701.c132 FACTOR(CLK_TOP_AUD1PLL_98M, "aud1pll_98m_ck", "aud1pll", 1, 3),
/openbmc/linux/arch/arm/boot/dts/mediatek/
H A Dmt2701.dtsi508 assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL_98M>,
H A Dmt7623.dtsi709 assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL_98M>,