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Searched refs:CLK_TOP_8BDAC_SEL (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/include/dt-bindings/clock/
H A Dmt7623-clk.h143 #define CLK_TOP_8BDAC_SEL 129 macro
/openbmc/linux/include/dt-bindings/clock/
H A Dmt2701-clk.h129 #define CLK_TOP_8BDAC_SEL 118 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt2701.c582 MUX_GATE(CLK_TOP_8BDAC_SEL, "8bdac_sel", clk_8bdac_parents,
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mt7623.c564 MUX_GATE(CLK_TOP_8BDAC_SEL, clk_8bdac_parents, 0xF0, 8, 2, 15),