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Searched refs:CLK_SRC_ISP_VAL (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-exynos/
H A Dexynos5_setup.h482 #define CLK_SRC_ISP_VAL NOT_AVAILABLE macro
749 #define CLK_SRC_ISP_VAL 0x33366000 macro
H A Dclock_init_exynos5.c945 writel(CLK_SRC_ISP_VAL, &clk->src_isp); in exynos5420_system_clock_init()