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Searched refs:CLK_SRC_FSYS_VAL (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/arm/mach-exynos/
H A Dclock_init_exynos4.c53 writel(CLK_SRC_FSYS_VAL, &clk->src_fsys); in system_clock_init()
H A Dexynos4_setup.h191 #define CLK_SRC_FSYS_VAL ((SATA_SEL_SCLKMPLL << 24) \ macro
/openbmc/u-boot/board/samsung/trats/
H A Dtrats.c319 writel(CLK_SRC_FSYS_VAL, (unsigned int)&clk->src_fsys); in board_clock_init()
H A Dsetup.h143 #define CLK_SRC_FSYS_VAL ((SATA_SEL_SCLKMPLL << 24) \ macro