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Searched refs:CLK_SRC_DMC_VAL (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-exynos/
H A Dclock_init_exynos4.c50 writel(CLK_SRC_DMC_VAL, &clk->src_dmc); in system_clock_init()
H A Dexynos4_setup.h79 #define CLK_SRC_DMC_VAL ((MUX_PWI_SEL_XUSBXTI << 16) \ macro