Searched refs:CLK_SMMU_MDMA0 (Results 1 – 4 of 4) sorted by relevance
| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | exynos5250.h | 151 #define CLK_SMMU_MDMA0 347 macro
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| H A D | exynos5420.h | 185 #define CLK_SMMU_MDMA0 504 macro
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| /openbmc/linux/drivers/clk/samsung/ |
| H A D | clk-exynos5250.c | 450 GATE(CLK_SMMU_MDMA0, "smmu_mdma0", "div_aclk266", GATE_IP_ACP, 5, 0, 0),
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| H A D | clk-exynos5420.c | 935 GATE(CLK_SMMU_MDMA0, "smmu_mdma0", "aclk266_g2d", GATE_IP_G2D, 5, 0, 0),
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