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Searched refs:CLK_SCLK_MPHY_PLL (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dsamsung,exynos5433-clock.yaml521 <&cmu_cpif CLK_SCLK_MPHY_PLL>,
/openbmc/linux/include/dt-bindings/clock/
H A Dexynos5433.h198 #define CLK_SCLK_MPHY_PLL 11 macro
/openbmc/linux/arch/arm64/boot/dts/exynos/
H A Dexynos5433.dtsi378 <&cmu_cpif CLK_SCLK_MPHY_PLL>,
400 <&cmu_cpif CLK_SCLK_MPHY_PLL>;
/openbmc/linux/drivers/clk/samsung/
H A Dclk-exynos5433.c888 GATE(CLK_SCLK_MPHY_PLL, "sclk_mphy_pll", "mout_mphy_pll",