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Searched refs:CLK_SCLK_GSCL_WA (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dexynos5250.h28 #define CLK_SCLK_GSCL_WA 131 macro
H A Dexynos5420.h57 #define CLK_SCLK_GSCL_WA 156 macro
/openbmc/linux/drivers/clk/samsung/
H A Dclk-exynos5250.c461 GATE(CLK_SCLK_GSCL_WA, "sclk_gscl_wa", "div_gscl_wa",
H A Dclk-exynos5420.c1150 GATE(CLK_SCLK_GSCL_WA, "sclk_gscl_wa", "mout_user_aclk333_432_gscl",