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Searched refs:CLK_SATA (Results 1 – 20 of 20) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dsun9i-a80-ccu.h101 #define CLK_SATA 75 macro
H A Dsun8i-r40-ccu.h147 #define CLK_SATA 123 macro
H A Dsun4i-a10-ccu.h153 #define CLK_SATA 122 macro
H A Dexynos5250.h81 #define CLK_SATA 277 macro
H A Dexynos4.h140 #define CLK_SATA 302 /* Exynos4210 only */ macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dsun9i-a80-ccu.h101 #define CLK_SATA 75 macro
H A Dsun8i-r40-ccu.h143 #define CLK_SATA 123 macro
H A Dsun4i-a10-ccu.h153 #define CLK_SATA 122 macro
/openbmc/linux/Documentation/devicetree/bindings/ata/
H A Dallwinner,sun8i-r40-ahci.yaml60 clocks = <&ccu CLK_BUS_SATA>, <&ccu CLK_SATA>;
/openbmc/linux/drivers/clk/sunxi-ng/
H A Dccu-sun4i-a10.c1166 [CLK_SATA] = &sata_clk.common.hw,
1332 [CLK_SATA] = &sata_clk.common.hw,
H A Dccu-sun9i-a80.c1047 [CLK_SATA] = &sata_clk.common.hw,
H A Dccu-sun8i-r40.c1118 [CLK_SATA] = &sata_clk.common.hw,
/openbmc/linux/drivers/clk/samsung/
H A Dclk-exynos5250.c561 GATE(CLK_SATA, "sata", "div_aclk200", GATE_IP_FSYS, 6, 0, 0),
H A Dclk-exynos4.c930 GATE(CLK_SATA, "sata", "aclk133", GATE_IP_FSYS, 10, 0, 0),
/openbmc/u-boot/arch/arm/dts/
H A Dsun4i-a10.dtsi558 clocks = <&ccu CLK_AHB_SATA>, <&ccu CLK_SATA>;
H A Dsun7i-a20.dtsi638 clocks = <&ccu CLK_AHB_SATA>, <&ccu CLK_SATA>;
/openbmc/linux/arch/arm/boot/dts/allwinner/
H A Dsun4i-a10.dtsi602 clocks = <&ccu CLK_AHB_SATA>, <&ccu CLK_SATA>;
H A Dsun8i-r40.dtsi457 clocks = <&ccu CLK_BUS_SATA>, <&ccu CLK_SATA>;
H A Dsun7i-a20.dtsi709 clocks = <&ccu CLK_AHB_SATA>, <&ccu CLK_SATA>;
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos5250.dtsi398 clocks = <&clock CLK_SATA>, <&clock CLK_SCLK_SATA>;