Searched refs:CLK_RESET_PLLP_BASE (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/arch/arm/mach-tegra/ |
| H A D | sleep-tegra20.S | 36 #define CLK_RESET_PLLP_BASE 0xa0 macro
206 pll_enable r1, r0, CLK_RESET_PLLP_BASE, PLLP_STORE_MASK
300 store_pll_state r0, r1, r5, CLK_RESET_PLLP_BASE, PLLP_STORE_MASK
306 ldr r0, [r5, #CLK_RESET_PLLP_BASE]
308 str r0, [r5, #CLK_RESET_PLLP_BASE]
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| H A D | sleep-tegra30.S | 52 #define CLK_RESET_PLLP_BASE 0xa0 macro
411 pll_enable r1, r0, CLK_RESET_PLLP_BASE, CLK_RESET_PLLP_MISC, PLLP_STORE_MASK
415 pll_locked r1, r0, CLK_RESET_PLLP_BASE, PLLP_STORE_MASK
430 ldr r1, [r0, #CLK_RESET_PLLP_BASE]
432 str r1, [r0, #CLK_RESET_PLLP_BASE]
696 store_pll_state r0, r1, r5, CLK_RESET_PLLP_BASE, PLLP_STORE_MASK
708 ldr r0, [r5, #CLK_RESET_PLLP_BASE]
711 str r0, [r5, #CLK_RESET_PLLP_BASE]
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