Searched refs:CLK_PPMULCD0 (Results 1 – 6 of 6) sorted by relevance
| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | exynos4.h | 223 #define CLK_PPMULCD0 408 macro
|
| H A D | exynos3250.h | 191 #define CLK_PPMULCD0 185 macro
|
| /openbmc/linux/drivers/clk/samsung/ |
| H A D | clk-exynos3250.c | 625 GATE(CLK_PPMULCD0, "ppmulcd0", "div_aclk_160", GATE_IP_LCD, 5,
|
| H A D | clk-exynos4.c | 838 GATE(CLK_PPMULCD0, "ppmulcd0", "aclk160", GATE_IP_LCD0, 5, 0, 0),
|
| /openbmc/linux/arch/arm/boot/dts/samsung/ |
| H A D | exynos3250.dtsi | 918 clocks = <&cmu CLK_PPMULCD0>;
|
| H A D | exynos4.dtsi | 829 clocks = <&clock CLK_PPMULCD0>;
|